A variety of semiconductor devices, for example, bipolar transistors, positive-intrinsic-negative (PIN) diodes, and varactor diodes are formed in a vertical configuration that requires a buried terminal located within a semiconductor substrate and at a depth from the surface of the semiconductor substrate. Contacts to such buried terminals are formed via a buried conductive layer, such as a heavily doped buried semiconductor layer, located within the semiconductor substrate and a reachthrough that vertically extends from the surface of the semiconductor substrate to the buried conductive layer.
Typically, the reachthrough, or the “sinker implant region” as it is alternatively called, is formed by ion implantation into a semiconductor region located above a portion of the buried conductive layer such that the semiconductor region is heavily doped with dopants. Relatively low conductivity, typically on the order of about 1.0×10−3 Ω-cm or less, may be achieved by heavy ion implantation with a dopant concentration in the range from about 3.0×1019/cm3 to about 5.0×1021/cm3, and preferably on the order of 2.0×1020/cm3 or higher. The function of the reachthrough is to provide a low resistance current path to the buried conductive layer, and therefore, any resistance of the reachthrough region is parasitic, i.e., unintended adverse circuit parameter.
Referring to FIG. 1, an exemplary prior art structure comprising a bipolar complementary metal-oxide-semiconductor (BiCMOS) structure is shown. The exemplary prior art structure comprises a semiconductor substrate 8, within which a semiconductor layer 10, shallow trench isolation 20, a buried conductive layer 28, which is a subcollector in this example, a reachthrough 31, a collector 41 of a bipolar transistor, and source and drain regions 35 of a metal-oxide-semiconductor field effect transistor (MOSFET) are formed. Components of the MOSFET such as a gate dielectric 32, a gate conductor 33, a gate spacer 34, and source and drain silicide 39 are located on top of the semiconductor substrate 8. Components of a bipolar transistor such as an intrinsic base 42, and extrinsic base 43, an emitter pedestal 44, an emitter 45, a reachthrough silicide 47, a base silicide 48, and an emitter silicide 49 are also located on top of the semiconductor substrate 8.
The reachthrough 31 in the exemplary prior art structure comprises a heavily doped semiconductor material. The reachthrough silicide 47 is formed on a top surface of the reachthrough 31, and consequently, does not directly contact the buried conductor layer 28. In this exemplary prior art structure, the reachthrough silicide 47, the reachthrough 31, and the buried conductive layer 28 form a current path for the bipolar transistor. Any resistance of the reachthrough 31 thus contributes to the parasitic resistance of the bipolar transistor structure. While providing a relative low resistivity, the resistivity of the doped semiconductor material in the reachthrough is still higher than that of a silicide material. The same problem applies to any semiconductor structure with a buried conductive layer and a reachthrough structure formed with a doped semiconductor material.
Thus, the parasitic resistance of the reachthrough oftentimes degrades or limits the performance of a semiconductor device with a buried terminal. For example, the unit current gain frequency (fT), which is the frequency at which the current gain becomes 1, and the maximum oscillation frequency (fMAX), which is the maximum frequency at which there is still power gain in a bipolar transistor, may be limited by the resistance of the reachthrough region that contacts a subcollector, which is a buried conductive layer formed by heavy doping of a buried semiconductor region. For another example, the quality factor Q of a varactor, which defines the sharpness of a resonance in a tuning circuit, may be degraded by a parasitic resistance of a reachthrough to a buried conductive layer which may be in contact with or integrated with a buried capacitor electrode.
Further, the depth of a buried conductive layer 28 is typically limited by the ability to form the reachthrough 31 that contacts the buried conductive layer 28. To provide a low resistance current path to the buried conductive layer 28, the reachthrough 31 must contact the buried conductive layer. While a deep buried conductive layer may be formed by implanting a semiconductor region followed by an epitaxy of a semiconductor material of significant thickness, for example, greater than 2 microns, the depth of the reachthrough that can be formed by ion implantation is limited by the projected range of the implanted ions. Thus, the reachthrough 31 does not contact the deep buried conductive layer if the depth of the deep buried conductive layer exceeds the projected ranges of the implanted ions. For example, the projected range of boron ions accelerated at 1.0 MeV and accelerated into silicon is only about 1.8 microns. The projected ranges for phosphorus ions and arsenic ions accelerated at 1.0 MeV and accelerated into silicon are even less, and are only about 1.2 microns and 0.6 microns, respectively. In addition, the buried conductive layers often require a heavy doping concentration on the order of 2.0×1020/cm3 or higher to achieve low resistivity. Implantation of dopants at such high energy and at such a high dose requires a long implantation time on a high performance ion implanter, and consequently, high processing costs. Further, even if such processing steps are employed, the depth of a buried conductive layer does not exceed 2.0 microns unless the ion implantation energy is increased even higher, which is difficult to achieve with commercially available ion implanters. In a structure containing a reachthrough 31 that contacts the buried conductive layer 28 as in FIG. 1, the increased depth of the buried conductive layer 28 also increases the vertical dimension of the reachthrough 31, and correspondingly increases the resistance of the reachthrough 31.
Therefore, there exists a need to provide semiconductor structures with a less resistive path from the surface of a semiconductor substrate to a buried conductive layer compared with the prior art reachthrough structures.
Further, there exists a need to provide a semiconductor structure that has a buried conducive layer located at a depth that exceeds the projected ranges of conventional ion implantation process and a low resistance contact to the buried conductive layer.
In addition, there exists a need to provide methods of manufacturing semiconductor structures with such a less resistive path from the surface of the semiconductor substrate to the buried conductive layer and/or with such a buried conducive layer located at a depth that exceeds the projected ranges of conventional ion implantation process with minimum additional processing steps and processing costs.